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Codewarrior HCS12 V5.1 license
文件说明:
1.IDE.exe是CodeWarrior v5.1 special的主程序,进行了图标替换,美化其主程序和关联文件图标
2.MyCodeWarriorComponent是一些调试时很有用的组件,v5.1所没有的仿真组件(比如LCD,Io_led,IT_keyboard)在该目录下
3.license.dat是special版本授权文件,v4.6,v5.0,v5.1下都可以用
4.CW12_V4_6_1_XS128_Debugger_Patch用于添加v4.6版本对于MC9S12XS128系列的支持
2013-06-08
Android反编译工具包(升级)
Android反编译工具包,内含图形和命令两种反编译方式,命令支持windows和linux平台,亲测验证成功!详见博客:Android APK反编译详解(附图) http://blog.csdn.net/sunboy_2050/article/details/6727581
2013-05-28
高速时间交错ADC 数字校准
Comprehensive Digital Correction of Mismatch
Errors for a 400-Msamples/s 80-dB SFDR
Time-Interleaved Analog-to-Digital Converter
Abstract—Comprehensive digital calibration of a high-speed
and high-resolution time-interleaved analog-to-digital converter
(TIADC) is described. A channel transfer function, which incorpo-
rates all linear errors between analog input and digital output, is
measured for each channel by applying a series of sinusoids. A set
of finite-impulse response (FIR) filters designed by the weighted
least squares principle provides frequency-dependent mismatch
correction so that the spurious-free dynamic range (SFDR) is no
longer limited by channel mismatches. A four-channel TIADC
prototype with 14-bit resolution and 400-MHz aggregate sampling
rate was built to verify the proposed correction method. Uncali-
brated SFDR was below 50 dB. After mismatch correction with
61-tap FIR filters, 80 dB of SFDR was achieved up to 175 MHz
of input frequency.
2013-01-09
基于FPGA高速并行采样技术的研究
介绍一种基于四通道 ADC 的高速交错采样设计方法以 及在 FPGA 平台 上的实 现。着重 阐述四通 道高速 采样
时钟的设计与实现、高速数据的同步接收以及采样 数据的 校正算 法。实验及 仿真结 果表明, 同 步数据 采集的结 构设计 和预
处理算法, 能良好抑制并行 ADC 输出 信号因相位偏移、时钟抖动等造成的失配误差。
关键词: 交错采样; 高速采样时钟; 同步接收 ; 信号处理
2013-01-09
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